This invention relates to data communications and, more particularly, to data communication protocols.
Recent advances in fiber optics have resulted in several orders of magnitude increase in the transmission bandwidth of communication channels. Utilization of the available bandwidth, coupled with the trend towards integration of information and communication services, requires handling of high speed traffic sources over widely dispersed networks. This means that communication processing generally, and handling of communication protocols in particular, must be done much faster than before. Currently, the only cost effective way of achieving such high speeds is through the use of specialized circuits. Such circuits are often realized with VLSI integrated circuits.
Generating VLSI designs directly from traditional protocol specifications is very expensive. Since there are several levels of abstraction between protocol specifications and the VLSI designs, a major redesign is required every time a change in the protocol is introduced. Further, most protocols are currently specified in the English language, and that condition introduces the normal ambiguities present in natural languages. Consequently, implementations of a protocol by two different manufacturers may be incompatible, and correcting errors due to the misinterpretation of the protocol specifications is very expensive.
On a different level, the available bandwidth and the ease of digital communication has encouraged the growth of data networks. This growth spawned a number of different protocols that were designed by independent concerns. Alas, these protocols were not designed to be compatible with each other, resulting in the existence of various networks that cannot communicate with one another. To facilitate such communication, it became necessary to design gateways which act as data transmission bridges between such networks. Efficient design of such gateways requires a standard reference model for describing communication protocols and this led to the seven-layered protocol model known as ISO-Open Systems Interconnect Model. Hubert Zimmerman, "A Standard Layer Model," Chapter 2, Computer Networks Architectures and Protocols, Paul Green (Editor), Plenum Press, 1983. The model specifies an orderly progression of protocol components from the top, application layer presented to the users, to the bottom, physical layer of the communications channel.
A large number of protocol implementations use special purpose processors that are program controlled. One such arrangement is described, for example, in U.S. Pat. No. 4,298,959 issued to F. D. Sundermeyer, et al. on Nov. 3, 1981. Many others are implemented with general purpose processors, in a uni-processor architecture and under software program control. Such software programs have ranged from monolithic code that implements the entire protocol as a single routine, to fairly complex collections of software modules. Examples of such arrangements are found in F. M. Restrorick, "Implementation of a transport protocol in an assembly language," Protocol Specification, Testing, and Verification, III (H. Rudin and C. West, Editors), North-Holland, 1983, and D. M. Ritchie, "A Stream Input-Output System," AT&T Bell Laboratories Technical Journal, October 1984, Vol. 63, No. 8, Part 2. Some of the more recent protocol implementations have been created in VLSI embodiments in order to achieve desired operating speed, but those designs basically realize custom special purpose circuits. One such implementation is described, for example, by A. A. Avanessians et al. in "A VLSI Link-Level Controller," Proceedings of ISSCC 84, February 1984.
The known VLSI protocol embodiments differ only in the extent to which the protocol functions are embedded in silicon (i.e. the partitioning of functions between silicon and software), and in the specific protocol that they implement. Typically, they implement a specific ISO layer or a fraction thereof, and are often not based on a formal description of the protocol functions. Consequently, these VLSI designs are often inflexible, necessitating a complete redesign when modifications need to be introduced. The lack of formalism also leads to difficulties in design validation.